Gsoc midterm, where to go next?

Gsoc midterm evaluations pass last week, and there’s some good news about the status of my project, since the close relation between Openembedded and Poky I extend the support for Xilinx platforms to Poky which is faster than OE to build the rootfs for the reason that are far less recipes to parse and some others features. While Poky support for virtex5 platforms resolves my thesis problem to provide a graphical desktop, it also makes easier the software development for new users by using the Poky Anjuta plug-in although in can be used with OE.

Ponky on xilinx virtex5

Microblaze support still needs some work, but I’m close to complete it there’s no major changes
that I need to add to OE just resolve some issues with gcc and binutils related on shared libraries
linkage, there was reported a similar problem in OE mailing list, and going to start looking on that

And since Gsoc program is approaching to the end, I’m considering to start looking on labor
market, but first I need to complete my thesis and unfortunately this means a two month slip
:(, at the moment I’m having some hard to track issues on a hardware bridge from the system
bus to a simple peripheral and requires to learn how to use chip-scope (virtual logic analyzer)
to track the signals in order to validate its behavior. Thank fully there are some channels on
YouTube where I can learn in a simple and pain less way thanks to several Indian Technology
Institutes for having lectures online.

Angstrom on Xilinx ML507

* Important this is an experimental and ongoing project
After several kernel panics and machine exceptions I’m now been able to boot Linux on Xilinx Ml507 development platform; This board combines a Powerpc 440 cpu with standard peripherals like ethernet, serial ports, DVI, sata, etc. plus a large re configurable area where custom hardware can be developed and interconnected to the main CPU via the processor bus.
Xilinx provides a development environment but the Linux board support is pretty old since most vendors don’t support this board any more. Since there was previous work on Openembedded supporting previous version of this platform (Powerpc 405 based) adding support for Ml507 board is simple.
Most of the problems that arise in my initial efforts was setting the correct Kernel options, erroneous hardware configurations, missing dev nodes in final root file system. Christopher ‘Embedded Linux premier’ book prove to be a great reference also many of the xilinx application notes that I have to check to learn about the gotchas.
At my github repo there’s the result hardware project there’s two branches the master branch holds the reference design as described in the application note [1] the second branch adds the device tree infrastructure to generate the hardware descriptor file (*.dts) that the Kernel uses to find out about the resources available in the target system.
I push some patches to Openembedded developers list to add the corresponding support, this was important in order to simplify the process of replicating my developing environment for new team members in the lab at my faculty. Some of the problems that I still have is that ethernet device is not working, I have read some applications notes that mention that the driver provided in the Linux kernel only works in certain configuration mode; Alternative I can use the soft-ethernet hardware module since is reported that works.
Soon I will post a quick howto with the steps to boot Linux, for the moment
On the next week I’m going to give a crash course using Openembedded at my faculty, and also seriously thinking that my current project is a good candidate for participating in Google summer of code which is right at the corner.
[1] Using U-Boot with the Xilinx ML507 Evaluation Platform

Xilinx 11.4 on Fedora 12; Playing with Spartan 3e starter kit

A few months ago I was at the Mexico city airport waiting for my flight departure and to kill time I went to look at magazines shop and found a Linux Journal with an article that cough my eye “Bere-Metal hacks with fpga programming” Marco Fioretti
article describes some FPGA basics covering Xilinx design tools, so I give a try to use Xilinx suite using an target platform a Spartan3e starter kit.
Xilinx suite does a better job than Altera Quartus software, installation is simpler not to mention that far less workarounds to get the environment setup and running; I found Gorge’s wiki a well document procedure to install Xilinx tools plus installing an alternative Jtag driver. The next steps are a simplification to get everything working under Fedora 12.
1. Get Xilinx suite.
Go to and get the full DVD suite or the Web installer client as you prefer; I downloaded the full suite `Xilinx_11.1_ISE_DS_SFD.tar`
2. Untar
tar xf Xilinx_11.1_ISE_DS_SFD.tar
3. Run the installer script
4. Install Jtag driver
Install dependencies
sudo yum -y install fxload libusb-devel
Get source code for alternative usb-driver
git clone git://
Build the driver
cd usb-driver
Copy the driver to a place that Xilinx tools can find it.
cp /opt/Xilinx/11.1/common/lib/lin64/
Copy udev rules and Jtag firmaware
cd /opt/Xilinx/11.1/common/bin/lin64/install_script/install_drivers/linux_drivers/pcusb/
sudo cp xusbdfwu.rules /etc/udev/rules.d/
sudo cp *.hex /usr/share/
Reload udev rules *Only needed the first time
sudo udevadm control –reload-rules
5. Create a setup-xlnx script and add the next lines
# Xilinx Webpack 11.1
# No need to preload usb library if you installed in a location
# where xlnx tools can find it
#export LD_PRELOAD=/usr/local/lib/
# Optional Xilinx license definitions, if you have access to them
#export XILINXD_LICENSE_FILE=”2100@pcdesign;X:\licenses\Xilinx.lic”
#export LM_LICENSE_FILE=”2100@pcdesign;X:\licenses\Xilinx.lic”
6. Open a terminal and source the setup-xlnx script
source setup-xlnx
7. Optionally run the xilinxupdate utility to get latest updates
8. Start playing with Xilinx tools
ise – hdl design
xps – system integration
xps_sdk – software development environment
impact – programming tool
9. Programming the FPGA
Once a you complete an hdl design you need to generate a bitstream file to program the FPGA the tools also crates a script that can be used to automate the programing process just run
impact -batch <project-path>/etc/download.cmd
10. Continue learning
I have found in youtube several tutorial for hdl design using Xilinx tools even complete courses thanks to several Indian institutes of Technology